US 6,983,361 B1
Apparatus and method for implementing switch instructions in an IA64 architecture
Geoffrey Owen Blandy, Austin, Tex. (US)
Assigned to International Business Machines Corporation, Armonk, N.Y. (US)
Filed on Sep. 28, 2000, as Appl. No. 9/671,973.
Int. Cl. G06F 9/00 (2006.01)
U.S. Cl. 712—236 26 Claims
OG exemplary drawing
 
1. A method of implementing a switch instruction in an IA64 architecture based data processing device, comprising:
receiving a call to the switch instruction, the call including one or more parameters for the switch instruction, wherein the one or more parameters includes a range of branch address, the range being defined by a high value and a low value;
loading a plurality of predicate registers with values associated with a plurality of branch addresses based on the one or more parameters;
calling an instruction associated with one of the plurality of branch addresses based on the values of the plurality of predicate registers;
determining if the low value is lower than a lowpredicate;
setting a first register value to 2**(lowpredicate-low value) if the low value is lower than the lowpredicate; and
setting the first register value to 2**(lowpredicate) if the low value is not zero, where lowpredicate is a predicate register number of a lowest numbered predicate register.