US 6,982,187 B2 | ||
Methods of making shallow trench-type pixels for CMOS image sensors | ||
Hoon Jang, Cheongju-si (Korea, Republic of); and Keun Hyuk Lim, Seoul (Korea, Republic of) | ||
Assigned to DongbuAnam Semiconductor, Inc., Seoul (Korea, Republic of) | ||
Filed on Jun. 26, 2003, as Appl. No. 10/606,693. | ||
Claims priority of application No. 10-2002-0036334 (KR), filed on Jun. 27, 2002. | ||
Prior Publication US 2004/0043530 A1, Mar. 04, 2004 | ||
Int. Cl. H01L 21/00 (2006.01); H01L 21/8238 (2006.01) |
U.S. Cl. 438—75 | 6 Claims |
1. A method for making shallow trench type pixel for complimentary metal oxide semiconductor (CMOS) image sensor, comprising: forming a CMOS image sensor on an epitaxial wafer having a structure including an epitaxial layer doped with a low dopant concentration positioned on a p-type or n-type substrate doped with a high concentration; forming a first photoresist layer over said structure, patterning the first photoresist layer, and etching the epitaxial layer so as to form a shallow trench on a pixel area defined by trench isolation structures; removing said first photoresist layer; forming a second photoresist pattern coexistive with said trench isolation structures so as to form a photodiode junction in at least a portion of the shallow trench of the pixel area, and, then, conducting ion-implanting process; and removing said second photoresist pattern and conducting a thermal treatment process. |