US 6,982,492 B2
No-flow underfill composition and method
Christopher L. Rumer, Chandler, Ariz. (US); Tian-An Chen, Phoenix, Ariz. (US); Vijay Wakharkar, Phoenix, Ariz. (US); and Paul A. Koning, Chandler, Ariz. (US)
Assigned to Intel Corporation, Santa Clara, Calif. (US)
Filed on Oct. 23, 2003, as Appl. No. 10/692,062.
Prior Publication US 2005/0087891 A1, Apr. 28, 2005
Int. Cl. H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01)
U.S. Cl. 257—783 12 Claims
OG exemplary drawing
 
1. A device comprising:
a substrate having a plurality of solder bumps;
an integrated circuit die having a plurality of connection bumps each bonded to a respective one of the solder bumps; and
an underfill between the substrate and the integrated circuit die, the underfill being at least partially filled with filler particles, at least some of the filler particles being electrically conductive;
wherein the filler particles include non-conductive particles and conductive particles;
wherein the non-conductive particles do not exceed 50% by volume of the underfill and the conductive particles do not exceed 30% by volume of the underfill.