US 6,982,455 B2 | ||
Semiconductor device and method of manufacturing the same | ||
Takahisa Hayashi, Tokyo (Japan) | ||
Assigned to Oki Electric Industry Co., Ltd., Tokyo (Japan) | ||
Filed on Nov. 04, 2003, as Appl. No. 10/699,734. | ||
Claims priority of application No. 2003-153693 (JP), filed on May 30, 2003. | ||
Prior Publication US 2004/0238865 A1, Dec. 02, 2004 | ||
Int. Cl. H01L 27/108 (2006.01); H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/119 (2006.01) |
U.S. Cl. 257—310 | 7 Claims |
1. A semiconductor device comprising:
a substrate including an integrated circuit;
an interlayer insulating layer formed on said substrate, said interlayer insulating layer having a contact hole;
a ferroelectric capacitor formed by a first electrode layer, a ferroelectric layer and a second electrode layer deposited
on said interlayer insulating layer in this order;
a wiring layer electrically connecting said second electrode layer of said ferroelectric capacitor to said integrated circuit
through said contact hole in said interlayer insulating layer; and
an insulating side wall film covering a peripheral section of said ferroelectric capacitor and electrically insulating said
peripheral section of said ferroelectric capacitor from said wiring layer, and being spaced from a peripheral edge section
of said contact hole.
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