US 6,982,759 B2 | ||
Amplification type solid-state imaging device having a potential detecting circuit for each unit cell and high-speed readout method thereof | ||
Hiroshige Goto, Yokohama (Japan) | ||
Assigned to Kabushiki Kaisha Toshiba, Kawasaki (Japan) | ||
Filed on Mar. 26, 2001, as Appl. No. 9/816,518. | ||
Claims priority of application No. 2000-090061 (JP), filed on Mar. 29, 2000. | ||
Prior Publication US 2001/0026321 A1, Oct. 04, 2001 | ||
Int. Cl. H04N 3/14 (2006.01); H04N 5/335 (2006.01) |
U.S. Cl. 348—302 | 5 Claims |
1. A solid-state imaging device comprising:
an imaging area having unit cells arranged in a two-dimensional fashion on a semiconductor substrate, each of the unit cells
including first and second photoelectric conversion/storage sections for photoelectrically converting incident light and storing
charges thus generated, first and second charge readout circuits for transferring charges stored in the first and second photoelectric
conversion/storage sections to a common charge detecting section, a potential detecting circuit for detecting charges transferred
to the charge detecting section, generating a potential corresponding to an arnount of detected charges and transmitting the
potential to a corresponding one of vertical signal lines, a reset circuit for discharging the charges transferred to the
charge detecting section, and an address circuit for selectively activating the potential detecting circuit;
a vertical driving circuit provided in correspondence to each pixel row of said imaging area, for driving the first and second
charge readout circuits, reset circuit and address circuit of each of the unit cells at preset timings;
signal processing circuits respectively attached to the vertical signal lines which are provided for respective columns of
the unit cells, for performing required signal processes;
a horizontal driving circuit for scanning outputs of said signal processing circuits in a horizontal direction at preset timings
to detect the same; and
an output circuit for outputting output signals of said signal processing circuits detected by the scanning operation by said
horizontal driving circuit;
wherein the solid-state imaging device has a first operation mode in which the first and second charge readout circuits are
driven at substantially the same timing by said vertical driving circuit, the charges stored in the first and second photoelectric
conversion/storage sections are transferred to and added together in the charge detecting section, and the potential detecting
circuit detects the added charges, generates and transmits a potential corresponding to an amount of detected charges to the
vertical signal line, and outputs the potential from said output circuit via said signal processing circuits.
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