1. A programmable frame splitter, comprising:
a plurality of programmable routers connected to a communication line, each of said routers having logic to control loading
and startup of said routers, and logic to specify which bits of a frame of serial data is passed to an output of each of said
routers; and
a plurality of field processing units to receive a bit clock out signal from each of said routers and serial data from the
communication line, wherein each of said field processing units splits the frame of serial data into component fields and
performs processing on the component fields wherein a control unit receives a bus signal, a frame start signal, and a bit-clock-in
signal.
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