US 6,982,975 B1 | ||
Packet switch realizing transmission with no packet delay | ||
Toshiya Aramaki, Tokyo (Japan); and Kazuhiko Isoyama, Tokyo (Japan) | ||
Assigned to NEC Corporation, Tokyo (Japan) | ||
Filed on Mar. 31, 2000, as Appl. No. 9/540,990. | ||
Claims priority of application No. 11-096996 (JP), filed on Apr. 02, 1999. | ||
Int. Cl. H04Q 11/04 (2006.01); H04L 12/56 (2006.01) |
U.S. Cl. 370—388 | 15 Claims |
4. A packet switch formed by connecting unit switches in multi-stages, wherein
a unit switch at the first stage assigns a sequence number to an input packet according to a destination of the packet and
distributes and sends out the packet to a unit switch at a succeeding stage,
a unit switch as the final stage sequences and outputs a packet received from a unit switch at a preceding stage according
to the sequence number assigned to the packet,
said unit switch at the first stage assigns, to an input packet, a sequence number set for each combination of a unit switch
which has received input of the packet and a unit switch which finally outputs the packet, as well as assigning identification
information about its own switch which is a unit switch having received input of said packet, and
said unit switch at the final stage
includes queues provided for the respective unit switches at the first stage which receive input of packets and slotted on
a packet basis,
based on said identification information and said sequence number assigned to a packet arriving from a unit switch at the
preceding stage, writes the packet in question into a corresponding slot of corresponding one of said queues, and
sequentially reads and outputs said packets written in said queues according to the order of said sequence numbers.
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