US 6,982,897 B2 | ||
Nondestructive read, two-switch, single-charge-storage device RAM devices | ||
Wing K. Luk, Chappaqua, N.Y. (US); and Robert H. Dennard, Croton on Hudson, N.Y. (US) | ||
Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
Filed on Oct. 07, 2003, as Appl. No. 10/680,348. | ||
Prior Publication US 2005/0073871 A1, Apr. 07, 2005 | ||
Int. Cl. G11C 11/24 (2006.01) |
U.S. Cl. 365—149 | 18 Claims |
1. A random access memory (RAM) circuit coupled to a write control line, a read control line, and at least one bitline, the
RAM circuit comprising:
a write switch having a control terminal and first and second terminals, the first terminal of the write switch coupled to
the at least one bitline, the control terminal of the write switch coupled to the write control line;
a charge-storage device having first and second terminals, wherein the first terminal of the charge-storage device is coupled
to the second terminal of the write switch and the second terminal of the charge-storage device is coupled to the read control
line; and
a read switch having a control terminal and first and second terminals, the control terminal of the read switch coupled to
the first terminal of the charge-storage device and coupled to the second terminal of the write switch, the first terminal
of the read switch coupled to the at least one bitline, and the second terminal of the read switch coupled to ground.
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