US 6,983,300 B2 | ||
Arithmetic unit | ||
Sebastien Ferroussat, Fontaine (France) | ||
Assigned to STMicroelectronics S.A., Gentilly (France) | ||
Filed on Jul. 30, 2001, as Appl. No. 9/919,482. | ||
Claims priority of application No. 00410091 (EP), filed on Aug. 01, 2000. | ||
Prior Publication US 2002/0038202 A1, Mar. 28, 2002 | ||
Int. Cl. G06F 7/50 (2006.01) |
U.S. Cl. 708—552 | 26 Claims |
1. An arithmetic unit for adding a plurality of values, each value falling within the range −2N−1 to 2N−1−1, to define a result, said arithmetic unit comprising:
an input for receiving said plurality of values;
an adder for adding said plurality of values to define a result, said result being within a first range −2N−1 to 2N−1−1;
circuitry for performing a round on the result to define a rounded result, wherein the rounded result falls within a third
range −2N to 2N−1+2(N/2)−1;
a detector for determining if said rounded result falls within a second range −2N−1 to 2N−1−1, said second range being smaller than the third range, said detector being arranged to consider only some of the bits of
said rounded result; and
circuitry for modifying said rounded result in so that the result output but said arithmetic unit falls within the second
range.
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