US 6,983,443 B2 | ||
System and method for placing clock drivers in a standard cell block | ||
Ryan Matthew Korzyniowski, Fort Collins, Colo. (US); and Troy Horst Frerichs, Fort Collins, Colo. (US) | ||
Assigned to Agilent Technologies, Inc., Palo Alto, Calif. (US) | ||
Filed on May 22, 2002, as Appl. No. 10/153,749. | ||
Prior Publication US 2003/0221179 A1, Nov. 27, 2003 | ||
Int. Cl. G06F 17/50 (2006.01) |
U.S. Cl. 716—18 | 18 Claims |
1. A method for placing clock drivers in a standard cell block, the method comprising:
providing an initial placement pattern for a plurality of clock drivers;
providing a netlist of a standard cell block;
from the initial placement pattern, determining a modifiable placement pattern of a set of the clock drivers to be added to
the netlist;
adding to the netlist the modifiable placement pattern of the set of clock drivers;
analyzing whether or not a set of clock signals, provided by the set of clock drivers, meets a timing specification;
modifying the placement of the set of clock drivers when the set of clock signals does not meet the timing specification;
and
repeating the analyzing and modifying until the set of clock signals meets the timing specification.
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