US 6,983,404 B2
Method and apparatus for checking the resistance of programmable elements
Douglas J. Cutter, Fort Collins, Colo. (US); Adrian E. Ong, Pleasanton, Calif. (US); Fan Ho, Sunnyvale, Calif. (US); Kurt D. Beigel, Boise, Id. (US); Brett M. Debenham, Meridian, Id. (US); Dien Luong, Boise, Id. (US); Kim Pierce, Meridian, Id. (US); and Patrick J. Mullarkey, Meridian, Id. (US)
Assigned to Micron Technology, Inc., Boise, Id. (US)
Filed on Feb. 05, 2001, as Appl. No. 9/777,036.
Application 09/777036 is a continuation of application No. 08/813525, filed on Mar. 07, 1997, granted, now 6,185,705.
Prior Publication US 2005/0005208 A1, Jan. 06, 2005
Int. Cl. G11C 29/00 (2006.01)
U.S. Cl. 714—721 21 Claims
OG exemplary drawing
 
1. A method of determining whether a programmable element in an integrated circuit has been programmed, comprising the acts of:
producing a first voltage at a first node based on a resistance of the programmable element;
producing a second voltage at a second node based on a known resistance; and
comparing the first and second voltages and producing an output signal having a binary value in response to the comparison, the binary value of the output signal indicating whether the programmable element has been programmed.