US 6,983,363 B2
Reset facility for redundant processor using a fiber channel loop
Aedan Diarmuid Cailean Coffey, Kilkenny (Ireland)
Assigned to Richmount Computers Limited, Dublin (Ireland)
Filed on Mar. 05, 2002, as Appl. No. 10/91,647.
Claims priority of application No. S2001/0223 (IE), filed on Mar. 08, 2001; and application No. S2001/0610 (IE), filed on Jun. 27, 2001.
Prior Publication US 2002/0129232 A1, Sep. 12, 2002
Int. Cl. G06F 9/24 (2006.01); G06F 15/177 (2006.01); G06F 13/00 (2006.01); G06F 11/00 (2006.01)
U.S. Cl. 713—1 2 Claims
OG exemplary drawing
 
2. A method for use with a system comprising first and second servers communicatively coupled over a fibre channel arbitrated loop (FC-AL) communications channel, each server comprising an FC-AL interfiace coupled to the FC-AL communications channel, and arranged to receive a frame containing an indicator of a reset command for a server including a processor associated with said resetting apparatus; and a reset controller, responsive to said reset command, to issue a reset interrupt command for resetting said processor; the method comprising the steps of:
at the first server, sending a frame over the FC-AL communications channel containing an indicator of a reset command addressed to the second server,
at the second server, receiving within a reset controller external to and distinct from the processor of the second servers the frame over the FC-AL communications channel containing the indicator of the reset command adddressed to the second server;
at the second server, in response to the receipt of the frame containing the indicator of the reset command, issuing a hardware reset interrupt command from the reset controller to the processor of the second server;
whereby the processor of the second server is reset by means of the hardware reset interrupt command.