US 6,981,849 B2 | ||
Electro-osmotic pumps and micro-channels | ||
Sarah E. Kim, Portland, Oreg. (US); R. Scott List, Beaverton, Oreg. (US); James Maveety, San Jose, Calif. (US); Alan Myers, Portland, Oreg. (US); Quat T. Vu, Santa Clara, Calif. (US); Ravi Prasher, Phoenix, Ariz. (US); and Ravindranath V. Mahajan, Tempe, Ariz. (US) | ||
Assigned to Intel Corporation, Santa Clara, Calif. (US) | ||
Filed on Dec. 18, 2002, as Appl. No. 10/323,084. | ||
Prior Publication US 2004/0120827 A1, Jun. 24, 2004 | ||
Int. Cl. F04B 44/08 (2006.01) |
U.S. Cl. 417—50 | 16 Claims |
1. An apparatus comprising:
a first semiconductor wafer including a heat generating layer that includes a plurality of heat generating devices;
a second semiconductor wafer including a first cooling layer including a microchannel to allow the passage of a fluid through
the microchannel and a plurality of electro-osmotic pumps to facilitate the passage of the fluid through the microchannel;
a third semiconductor wafer including a second cooling layer thermally coupled to said heat generating layer; and
a fourth semiconductor wafer including a recombiner fluidically connected to the first and second cooling layers, said first,
second, third, and fourth semiconductor wafers being combined in face to face relationship to form an integrated structure.
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