US 6,982,915 B2
SRAM with temperature-dependent voltage control in sleep mode
Theodore W. Houston, Richardson, Tex. (US); Luan Dang, Richardson, Tex. (US); and Andrew Marshall, Dallas, Tex. (US)
Assigned to Texas Instruments Incorporated, Dallas, Tex. (US)
Filed on Dec. 22, 2003, as Appl. No. 10/745,429.
Prior Publication US 2005/0135175 A1, Jun. 23, 2005
Int. Cl. G11C 7/04 (2006.01)
U.S. Cl. 365—211 33 Claims
OG exemplary drawing
 
1. An electronic device, comprising:
a plurality of data storage cells, collectively operable in a data access mode and separately in a sleep mode, wherein the sleep mode comprises a period of time during which the plurality of data cells are not accessed and during which a data state stored in each cell in the plurality of data cells is to be maintained at a valid state; and
circuitry for providing at least one temperature-dependent voltage to at least one storage device in each cell in the plurality of data storage cells during the sleep mode.