US 6,982,599 B1 | ||
Multistage differential amplifier with commonly controlled input and output common mode voltages | ||
Arlo Aude, Atlanta, Ga. (US) | ||
Assigned to National Semiconductor Corporation, Santa Clara, Calif. (US) | ||
Filed on Feb. 04, 2004, as Appl. No. 10/771,961. | ||
Int. Cl. H03F 3/45 (2006.01) |
U.S. Cl. 330—258 | 18 Claims |
1. An apparatus including a multistage differential amplifier with commonly controlled input and output common mode voltages,
comprising:
first and second differential input terminals to convey first and second phases of a differential input signal with an associated
input common mode voltage;
first and second differential output terminals to convey first and second phases of a differential output signal corresponding
to said differential input signal with an associated output common mode voltage;
a common mode control terminal to convey a common mode control signal for jointly controlling said input and output common
mode voltages; and
a plurality of differential amplifier circuits successively coupled between said common mode control terminal, said first
and second differential input terminals, and said first and second differential output terminals, wherein
each one of said plurality of differential amplifier circuits includes first and second amplifier input terminals, first and
second amplifier output terminals, an input control terminal and an output control terminal,
a first one of said plurality of differential amplifier circuits is coupled to said first and second differential input terminals
via said first and second amplifier input terminals, and is further coupled to said common mode control terminal via said
input control terminal,
a last one of said plurality of differential amplifier circuits is coupled to said first and second differential output terminals
via said first and second amplifier output terminals, and
said first and second amplifier input terminals and said input control terminal of each succeeding one of said plurality of
differential amplifier circuits is coupled to said first and second amplifier output terminals and said output control terminal,
respectively, of a preceding one of said plurality of differential amplifier circuits.
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