US 6,981,320 B2 | ||
Circuit board and fabricating process thereof | ||
Kwun-Yao Ho, Hsin-Tien (Taiwan); and Moriss Kung, Hsin-Tien (Taiwan) | ||
Assigned to VIA Technologies, Inc., Taipei Hsien (Taiwan) | ||
Filed on Dec. 29, 2003, as Appl. No. 10/748,478. | ||
Claims priority of application No. 92114526 A (TW), filed on May 29, 2003. | ||
Prior Publication US 2004/0238215 A1, Dec. 02, 2004 | ||
Int. Cl. H01K 3/10 (2006.01) |
U.S. Cl. 29—852 | 6 Claims |
1. A process of fabricating a circuit board, comprising:
(a) providing a core layer, a first dielectric layer, and a second dielectric layer, said first dielectric layer including
at least a first conducting column passing through said first dielectric layer, said second dielectric layer including at
least a second conducting column passing through said second dielectric layer;
(b) laminating said core layer, said first dielectric layer, and said second dielectric layer to form a laminating layer,
said core layer being positioned between said first dielectric layer and said second dielectric layer;
(c) forming at least a first through hole passing through said laminating layer;
(d) filling said first through hole with a conducting material to form a third conducting column; and
(e) forming a first patterned conducting layer and a second patterned conducting layer on two sides of said laminating layer
respectively.
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