US 6,982,191 B2 | ||
Methods relating to forming interconnects and resulting assemblies | ||
Charles E. Larson, Nampa, Id. (US) | ||
Assigned to Micron Technology, Inc., Boise, Id. (US) | ||
Filed on Sep. 19, 2003, as Appl. No. 10/667,003. | ||
Prior Publication US 2005/0064696 A1, Mar. 24, 2005 | ||
Int. Cl. H01L 21/44 (2006.01); H01L 21/48 (2006.01); H01L 21/50 (2006.01) |
U.S. Cl. 438—118 | 38 Claims |
1. A method for electrically connecting semiconductor component substrates, comprising:
providing a first semiconductor component substrate having at least one interconnect element on a surface thereof;
disposing a dielectric element having at least one cavity therein on the surface of the first semiconductor component substrate,
with the at least one cavity located over the at least one interconnect element;
providing a second semiconductor component substrate having at least another interconnect element on a surface thereof;
securing the second semiconductor component substrate to the first semiconductor component substrate with the dielectric element
interposed therebetween and the at least another interconnect element of the second semiconductor component substrate aligned
with the at least one cavity to form at least one interconnect void; and
injecting a flowable conductive material into the at least one interconnect void through one of the first and second semiconductor
component substrates to form at least one conductive interconnect structure between the at least one and the at least another
interconnect elements.
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