US 7,321,150 B2 | ||
Semiconductor device precursor structures to a double-sided capacitor or a contact | ||
Fred Fishburn, Boise, Id. (US); Forest Chen, Boise, Id. (US); and John M. Drynan, Boise, Id. (US) | ||
Assigned to Micron Technology, Inc., Boise, Id. (US) | ||
Filed on Jan. 06, 2005, as Appl. No. 11/30,696. | ||
Application 11/030696 is a division of application No. 10/714115, filed on Nov. 13, 2003, granted, now 6,962,846, filed on Nov. 08, 2006. | ||
Prior Publication US 2005/0118760 A1, Jun. 02, 2005 | ||
Int. Cl. H01L 27/108 (2006.01); H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/119 (2006.01) |
U.S. Cl. 257—309 [257/307; 257/311] | 5 Claims |
1. An intermediate semiconductor device structure for forming a double-sided capacitor, comprising:
a semiconductor wafer comprising at least one opening in a first insulating layer thereof, the semiconductor wafer defining
a precursor structure to a double-sided capacitor comprising:
a first sacrificial liner in contact with sidewalls of the at least one opening in the first insulating layer;
a sacrificial plug substantially filling the at least one opening in the first insulating layer;
at least one opening in a second insulating layer formed over the first insulating layer, the at least one opening in the
second insulating layer exposing the sacrificial plug; and
a second sacrificial liner in contact with sidewalls of the at least one opening in the second insulating layer, the second
sacrificial liner in substantial alignment with the first sacrificial liner.
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