US 7,321,513 B2 | ||
Semiconductor device and method of generating a reference voltage therefor | ||
Yoshihiro Tsukidate, Kawasaki (Japan) | ||
Assigned to Spansion LLC, Sunnyvale, Calif. (US) | ||
Filed on Mar. 28, 2006, as Appl. No. 11/392,398. | ||
Application 11/392398 is a continuation of application No. PCT/JP2005/006266, filed on Mar. 31, 2005. | ||
Prior Publication US 2007/0035993 A1, Feb. 15, 2007 | ||
Int. Cl. G11C 16/06 (2006.01) |
U.S. Cl. 365—185.2 [365/185.21; 365/185.09] | 10 Claims |
1. A semiconductor device comprising:
at least two reference cells;
a first cascode circuit coupled to at least a first one of the at least two reference cells and comprising at least two current
mirror circuits, the first cascade circuit outputting voltages dependent on a current flowing through the at least a first
one of the at least two reference cells to a first set of at least two output paths;
a second cascode circuit coupled to at least a second one of the at least two reference cells and comprising at least two
current mirror circuits, the second cascade circuit outputting voltages dependent on a current flowing through the at least
a second one of the at least two reference cells to a second set of at least two output paths; and
a switch that selectively connects output paths of the first set of at least two output paths and the second set of at least
two output paths to a given output terminal, thereby providing a reference voltage at the given output terminal, the reference
voltage generated in response to the current flowing through the at least a first one of the at least two reference cells
and the current flowing through the at least a second one of the at least two reference cells.
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