US RE40,011 E1
System for coupling programmable logic device to external circuitry which selects a logic standard and uses buffers to modify output and input signals accordingly
Nghia Tran, Milpitas, Calif. (US); Ying Xuan Li, Cupertino, Calif. (US); Janusz Balicki, San Jose, Calif. (US); and John Costello, Los Altos, Calif. (US)
Assigned to Altera Corporation, San Jose, Calif. (US)
Filed on Oct. 19, 2001, as Appl. No. 10/84,757.
Application 10/084757 is a reissue of application No. 08/543649, filed on Oct. 16, 1995, now 5,970,255, filed on Oct. 19, 1999.
Int. Cl. H03K 19/173 (2006.01)
U.S. Cl. 326—46  [326/40] 39 Claims
OG exemplary drawing
 
[ 35. A programmable input/output device for coupling a programmable logic device (PLD) to external circuitry, the input/output device comprising:
an input/output pad;
an output buffer adapted to receive output signals from the PLD, the output buffer modifying the output signals and being coupled to the input/output pad;
an input buffer adapted to receive a reference signal and input signals from the input/output pad and from the output buffer, the input buffer comparing the received input signals to the reference signal to produce a differential signal and coupling the differential signal to the PLD to provide the PLD with modified input signals; and
a plurality of programmable elements that select the standard with which the output buffer and the input buffer respectively modify the output and input signals.]