US 7,321,959 B2 | ||
Control method of a non-volatile memory apparatus | ||
Toshiyuki Honda, Kyotanabe (Japan); Masayuki Toyama, Neyagawa (Japan); and Keisuke Sakai, Kyoto (Japan) | ||
Assigned to Matsushita Electric Industrial Co., Ltd., Osaka (Japan) | ||
Appl. No. 10/496,622 PCT Filed Sep. 29, 2003, PCT No. PCT/JP03/12448 § 371(c)(1), (2), (4) Date May 25, 2004, PCT Pub. No. WO2004/031966, PCT Pub. Date Apr. 15, 2004. |
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Claims priority of application No. 2002-290297 (JP), filed on Oct. 02, 2002. | ||
Prior Publication US 2005/0013154 A1, Jan. 20, 2005 | ||
Int. Cl. G06F 12/00 (2006.01) |
U.S. Cl. 711—156 [365/185.09; 365/185.33; 711/203] | 5 Claims |
1. A control method of a non-volatile memory apparatus comprising:
a controlling step of controlling data writing and data readout of a non-volatile memory, by using an erased table and a logical
address/physical address conversion table, the non-volatile memory having a plurality of physical blocks, each physical block
being an erasing unit of data, the erased table indicating whether the physical blocks are erased or not, the logical address/physical
address conversion table converting a logical address to a physical address;
a writing step; the writing step of including:
a first flag writing step of writing a fixed value on a first flag existing in a redundancy area on a first page of a physical
block onto which data is to be written, a value of said first flag indicating whether data is to be written onto the first
page of the physical block or not, the first page being within a plurality of pages which are included in said physical block,
each page having a data area and the redundancy area, and each page being a minimum data writing unit, the first flag being
included in each physical block; and
a data writing step of writing data onto the first page after the first flag writing step; and
an initialization step of reading out said first flag of all said physical blocks of said non-volatile memory at the startup
of the non-volatile memory apparatus, and generating the logical address/physical address conversion table and the erased
table based on whether said first flag is written or not.
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