US 7,320,904 B2 | ||
Manufacturing method for non-active electrically structures in order to optimize the definition of active electrically structures in an electronic circuit integrated on a semiconductor substrate and corresponding circuit | ||
Paolo Giuseppe Cappelletti, Seveso (Italy); Alfonso Maurelli, Sulbiate (Italy); and Paola Zabberoni, Monza (Italy) | ||
Assigned to STMicroelectronics S.r.l., Agrate Brianza (Italy) | ||
Filed on Jan. 19, 2006, as Appl. No. 11/334,988. | ||
Application 11/334988 is a division of application No. 10/911220, filed on Aug. 03, 2004, granted, now 7,001,800. | ||
Claims priority of application No. 03425532 (EP), filed on Aug. 04, 2003. | ||
Prior Publication US 2006/0189136 A1, Aug. 24, 2006 | ||
This patent is subject to a terminal disclaimer. | ||
Int. Cl. H01L 21/82 (2006.01); H01L 29/76 (2006.01) |
U.S. Cl. 438—129 [257/368] | 14 Claims |
1. A method for manufacturing an electronic circuit comprising:
forming first electrically active structures in a semiconductor substrate;
forming second electrically active structures in the semiconductor substrate; and
forming electrically non-active structures in the semiconductor substrate to make uniform a surface of the semiconductor substrate,
the electrically non-active structures comprising a first group of electrically non-active structures adjacent the first and
second electrically active structures and being in a form of a closed polygon.
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