US 7,321,240 B2 | ||
Driver circuit for binary signals | ||
Andre Schaefer, München (Germany) | ||
Assigned to Infineon Technologies AG, Munich (Germany) | ||
Filed on Dec. 22, 2005, as Appl. No. 11/316,379. | ||
Claims priority of application No. 10 2004 061 738 (DE), filed on Dec. 22, 2004. | ||
Prior Publication US 2006/0170456 A1, Aug. 03, 2006 | ||
Int. Cl. H03K 19/0175 (2006.01) |
U.S. Cl. 326—82 [326/83; 326/27; 326/87; 327/175] | 13 Claims |
1. A driver circuit, comprising:
a first branch circuit disposed between an input node and an output node; wherein the first branch circuit includes a first
output stage;
a second branch circuit disposed between the input node and the output node and connected in parallel with to the first branch
circuit, wherein the second branch circuit contains a second output; and
a duty ratio control device configured to set a signal propagation time of the binary signal from the input node to the first
output stage relative to a signal propagation time of the binary signal from the input node to the second output stage, wherein
the duty ratio control device comprises:
a first controllable delay device arranged in the first branch circuit; and
a second controllable delay device arranged in the second branch circuit.
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