US 7,321,998 B2 | ||
Semiconductor integrated circuit having a number of data output pins capable of selectively providing output signals and test method thereof | ||
Nam-Jung Her, Kyungki-do (Korea, Republic of); and Seok-Young Han, Kyungki-do (Korea, Republic of) | ||
Assigned to Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do (Korea, Republic of) | ||
Filed on Mar. 17, 2004, as Appl. No. 10/803,792. | ||
Claims priority of application No. 10-2003-0016587 (KR), filed on Mar. 17, 2003. | ||
Prior Publication US 2005/0005210 A1, Jan. 06, 2005 | ||
Int. Cl. G01R 31/28 (2006.01) |
U.S. Cl. 714—724 [714/27; 714/30; 714/734] | 13 Claims |
1. A semiconductor integrated circuit comprising:
a plurality of data output pins divided in at least two groups of data output pins;
a data processing circuit to generate output signals responsive to an input signal; and
an output selection circuit with at least a normal mode and a test mode;
where a first group of output signals are provided to a first group of data output pins during a first test cycle of the test
mode;
where a second group of output signals are provided to the first group of data output pins during a second test cycle of the
test mode; and
where during the normal mode:
the first group of output signals are provided to the corresponding data output pins of the first group of data output pins;
and
the second group of output signals are provided to the corresponding data output pins of a second group of data output pins.
|