US 7,320,933 B2
Double bumping of flexible substrate for first and second level interconnects
Teck Kheng Lee, Singapore (Singapore); Kian Chai Lee, Singapore (Singapore); and Sian Yong Khoo, Singapore (Singapore)
Assigned to Micron Technology, Inc., Boise, Id. (US)
Filed on Apr. 22, 2004, as Appl. No. 10/829,778.
Application 10/829778 is a division of application No. 10/225085, filed on Aug. 20, 2002.
Prior Publication US 2004/0198033 A1, Oct. 07, 2004
Int. Cl. H01L 21/44 (2006.01)
U.S. Cl. 438—614  [438/108; 438/612; 438/613] 19 Claims
OG exemplary drawing
 
1. A method of forming an interposer substrate having a first level interconnect and a second level interconnect, the method comprising:
plating conductive bumps associated with a first major surface of a substantially planar interposer substrate body in a pattern for the first level interconnect and conductive bumps associated with a second major surface of the interposer substrate body in a pattern for the second level interconnect to at least one conductive line carried by the interposer substrate body, plating comprising plating the conductive bumps associated with at least one of the first major surface and the second major surface in at least some through holes of a plurality of through holes in the interposer substrate body;
providing conductive paste within at least one through hole of the plurality of through holes; and
providing a conductive ball at least partially within the conductive paste, the conductive ball protruding from at least one of the first major surface and the second major surface of the interposer substrate body.