US 7,321,916 B2 | ||
Methods and apparatus for extracting integer remainders | ||
John R. Harrison, Beaverton, Oreg. (US); and Ping T. Tang, Hayward, Calif. (US) | ||
Assigned to Intel Corporation, Santa Clara, Calif. (US) | ||
Filed on Jul. 28, 2003, as Appl. No. 10/628,811. | ||
Prior Publication US 2005/0027775 A1, Feb. 03, 2005 | ||
Int. Cl. G06F 7/535 (2006.01) |
U.S. Cl. 708—654 [708/504; 708/491] | 5 Claims |
1. A system comprising:
a bit extractor; and
a remainder value generator coupled to the bit extractor, wherein the bit extractor is configured to extract a residuary subset
bitfield associated with an intermediate remainder calculating value and a compound exponent value, and wherein the remainder
value generator is configured to generate a remainder value that is associated with the intermediate remainder calculating
value.
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