US 7,320,173 B2
Method for interconnecting multi-layer printed circuit board
Sung-Gue Lee, Gyeonggi-Do (Korea, Republic of); Jung-Ho Hwang, Gyeonggi-Do (Korea, Republic of); Joon-Wook Han, Gyeonggi-Do (Korea, Republic of); Sang-Min Lee, Gyeonggi-Do (Korea, Republic of); Tae-Sik Eo, Gyeonggi-Do (Korea, Republic of); and Yu-Seock Yang, Seoul (Korea, Republic of)
Assigned to LG Electronics Inc., Seoul (Korea, Republic of)
Filed on Feb. 03, 2004, as Appl. No. 10/769,885.
Claims priority of provisional application 60/463322, filed on Apr. 17, 2003.
Claims priority of application No. 10-2003-0007572 (KR), filed on Feb. 06, 2003.
Prior Publication US 2004/0154162 A1, Aug. 12, 2004
Int. Cl. H05K 3/02 (2006.01); H05K 3/10 (2006.01)
U.S. Cl. 29—846  [29/830; 29/842; 174/261; 216/18; 427/97.1] 8 Claims
OG exemplary drawing
 
1. A method for interconnecting a multi-layer printed circuit board, comprising:
selectively removing portions of an etching resist layer provided on at least one first metal layer to form a plating groove that selectively exposes a corresponding portion of the at least one first metal layer;
forming a plated layer at the surface of the first metal layer exposed by the plating groove through a plating process, wherein the plated layer forms a connection protrusion;
leveling a top surface of the connection protrusion;
removing a remaining portion the etching resist layer;
forming an insulation layer at the at least one first metal layer, wherein an end portion of the connection protrusion protrudes from a surface of the insulation layer, and wherein the connecting protrusion is formed by abrading and flattening the end portion of the connection protrusion which protrudes from the surface of the insulation layer after the insulation layer is formed; and
providing a second metal layer at the surface of the insulation layer which is electronically coupled to the end portion of the connection protrusion, wherein the at least one first metal layer comprises two first metal layers, wherein a first metal layer is provided on each of two opposite sides of a base sheet, with an etching resist layer provided on a side of each first metal layer not in contact with the base sheet to form a base material from the base sheet, the first metal layers, and the etching resist layers, the method further comprising:
separating the first metal layer, insulation layer, and second metal layer formed on one side of the base sheet from the first metal layer, insulation layer, and second metal layer formed on the other side of the base sheet to form two separate substrates; and
forming a circuit pattern in the first and second metal layers of each of the two separated substrates.