US 7,321,135 B2 | ||
Flat panel display | ||
Sang-Il Park, Seoul (Korea, Republic of); and Jae Bon Koo, Yongin (Korea, Republic of) | ||
Assigned to Samsung SDI Co., Ltd., Suwon (Korea, Republic of) | ||
Filed on Dec. 29, 2004, as Appl. No. 11/23,658. | ||
Application 11/023658 is a division of application No. 10/673152, filed on Sep. 30, 2003, granted, now 7,002,302. | ||
Claims priority of application No. 2002-61082 (KR), filed on Oct. 07, 2002; and application No. 2003-24508 (KR), filed on Apr. 17, 2003. | ||
Prior Publication US 2005/0110424 A1, May 26, 2005 | ||
Int. Cl. G09G 5/00 (2006.01) |
U.S. Cl. 257—72 [257/200; 257/202] | 7 Claims |
1. A flat panel display comprising R, G and B unit pixels, wherein at least one unit pixel of the R, G and B unit pixels includes
at least a switching transistor comprising a first gate region, and a driving transistor comprising a second gate region,
wherein the first gate region is a channel region under a gate electrode of the switching transistor, and the second gate
region is an offset region between two channel regions under a gate electrode of the driving transistor as well as the two
channel regions, and
wherein the resistance value of the first gate region is different from a resistance value of the second gate region.
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