US 7,321,147 B2 | ||
Semiconductor device including a trench capacitor | ||
Mutsumi Okajima, Yokohama (Japan) | ||
Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
Filed on Jan. 17, 2006, as Appl. No. 11/332,153. | ||
Claims priority of application No. 2005-325580 (JP), filed on Nov. 10, 2005. | ||
Prior Publication US 2007/0102744 A1, May 10, 2007 | ||
Int. Cl. H01L 29/94 (2006.01) |
U.S. Cl. 257—301 [257/304; 257/E27.092] | 3 Claims |
1. A semiconductor device comprising:
a cell transistor including diffused regions formed in a surface of a semiconductor substrate;
a trench capacitor formed in said semiconductor substrate for configuring a DRAM cell together with said cell transistor;
a buried strap formed in said semiconductor substrate to connect said diffused region to said trench capacitor; and
a collar insulation film formed on sides of said buried strap;
wherein said buried strap is isolated from said semiconductor substrate at the opposite side far from said cell transistor
by said collar insulation film extending to said surface of said semiconductor substrate, and
wherein said buried strap is isolated from said semiconductor substrate by a silicon nitride film at a side opposite said
cell transistor and connected to said diffused region via a surface strap connected to top of said buried strap.
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