US 7,321,164 B2 | ||
Stack structure with semiconductor chip embedded in carrier | ||
Shih-Ping Hsu, Hsin-chu (Taiwan) | ||
Assigned to Phoenix Precision Technology Corporation, Hsin-Chu (Taiwan) | ||
Filed on Dec. 05, 2005, as Appl. No. 11/294,842. | ||
Claims priority of application No. 94127691 A (TW), filed on Aug. 15, 2005. | ||
Prior Publication US 2007/0035015 A1, Feb. 15, 2007 | ||
Int. Cl. H01L 23/02 (2006.01); H01L 23/34 (2006.01) |
U.S. Cl. 257—686 [257/685; 257/723; 257/725; 257/773; 257/774; 257/776; 257/777; 257/E25.013; 257/E23.169; 361/735; 361/790] | 13 Claims |
1. A stack structure with semiconductor chips embedded in carriers, comprising: two carriers having at least one cavity respectively
formed thereto, wherein the carriers are stacked by a linking layer;
at least two semiconductor chips placed in the cavities of the carriers, wherein the semiconductor chips are respectively
formed with an active surface having a plurality of electrode pads and an inactive surface corresponding thereto;
at least one dielectric layer formed on the active surface of the semiconductor chip and the surface of the carrier, wherein
at least an opening is formed in the dielectric layer at a position corresponding to the top of the electrode pad; and
at least one circuit layer formed on the surface of the dielectric layer and at least a conductive structure formed in the
opening of the dielectric layer, wherein the circuit layer is electrically connected to the electrode pad of the semiconductor
chip by the conductive structure.
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