US 7,322,019 B2 | ||
Electronic circuit designing method and apparatus, and storage medium | ||
Toshiro Sato, Kawasaki (Japan); Kazumasa Kobayashi, Kawasaki (Japan); and Shogo Fujimori, Kawasaki (Japan) | ||
Assigned to Fujitsu Limited, Kawasaki (Japan) | ||
Filed on Jul. 09, 2002, as Appl. No. 10/190,721. | ||
Claims priority of application No. 2001-210671 (JP), filed on Jul. 11, 2001; and application No. 2002-101646 (JP), filed on Apr. 03, 2002. | ||
Prior Publication US 2003/0014725 A1, Jan. 16, 2003 | ||
Int. Cl. G06F 17/50 (2006.01) |
U.S. Cl. 716—10 [716/11] | 24 Claims |
1. An electronic circuit designing method for designing an electronic circuit by CAD, comprising:
generating design constraints with respect to the electronic circuit based on general layout and wiring information including
registration information related to substrate external shapes and device external shapes registered by a user, a device mounting
position definition defined by the user, and at least one of user requirements defined by the user, and user resources defined
by the user; and
displaying the design constraints,
wherein the user requirements include at least one of requirements selected from a group consisting of signal integrity and
delay, electromagnetic interference, electromagnetic compatibility limitations, junction temperature, and cost and reliability,
and
the user resources include at least one of resources selected from a group consisting of substrate specifications, device
specifications and junction temperatures.
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