US 7,322,042 B2
Secure and backward-compatible processor and secure software execution thereon
Pramila Srinivasan, San Jose, Calif. (US); John Princen, Cupertino, Calif. (US); Frank Berndt, Cupertino, Calif. (US); David Blythe, San Carlos, Calif. (US); William Saperstein, San Carlos, Calif. (US); and Wei Yen, Los Altos Hills, Calif. (US)
Assigned to BroadOn Communications Corp., Palo Alto, Calif. (US)
Filed on Feb. 07, 2003, as Appl. No. 10/360,827.
Prior Publication US 2004/0158742 A1, Aug. 12, 2004
Int. Cl. G06F 21/02 (2006.01); G06F 13/20 (2006.01); H04L 9/00 (2006.01)
U.S. Cl. 726—17  [726/27; 705/51; 710/260] 115 Claims
OG exemplary drawing
 
1. A method including steps of
performing application software by a single-processor processing unit;
verifying that said single-processor processing unit is authorized to perform said application software;
distinguishing for said single-processor processing unit between a monitored mode and a secure mode;
switching from said monitored mode to said secure mode in response to a non-maskable interrupt (NMI) signal;
wherein
in said monitored mode said single-processor processing unit is capable of performing said application software transparently to said application software,
in said secure mode said single-processor processing unit is capable of verifying, using persistent memory internal to the single-processor processing unit, that said single-processor processing unit is authorized to perform said application software,
wherein said single-processor processing unit performs the application software and verifies that said single-processor processing unit is authorized to perform said application software.