US 7,321,153 B2
Semiconductor memory device and corresponding programming method
Jean-Pierre Schoellkopf, Grenoble (France)
Assigned to STMicroelectronics SA, Montrouge (France)
Filed on Jan. 26, 2006, as Appl. No. 11/340,164.
Claims priority of application No. 05 01007 (FR), filed on Feb. 02, 2005.
Prior Publication US 2006/0170063 A1, Aug. 03, 2006
Int. Cl. H01L 27/10 (2006.01)
U.S. Cl. 257—390  [257/910; 257/E27.102] 22 Claims
OG exemplary drawing
 
1. A memory device comprising:
at least one cell storing a binary data item and including a semiconductor substrate region and first, second, third and fourth active zones that are mutually laterally isolated within the substrate;
the first active zone to be connected to a first voltage, the second active zone, of an opposite type of conductivity to that of the first active zone, to be connected to a second voltage;
an electrically conductive connection adjacent the substrate and connecting together the third and fourth active zones;
a semiconductor electrical connection within the substrate to electrically connect at least one of the third and fourth active zones to at least one of the first active zone and the second active zone, depending on the logic value of the binary data item; and
a semiconductor electrical isolation within the substrate to electrically isolate the third and fourth active zones from at least one of the second active zone and the first active zone, respectively.