US 7,321,637 B2
Data slice control device and control method
Keiichi Kuzumoto, Neyagawa (Japan)
Assigned to Matsushita Electric Industrial Co., Ltd., Osaka (Japan)
Filed on Jan. 25, 2005, as Appl. No. 11/41,215.
Claims priority of application No. 2004-18786 (JP), filed on Jan. 27, 2004.
Prior Publication US 2005/0162298 A1, Jul. 28, 2005
Int. Cl. H04L 25/06 (2006.01); H04L 25/10 (2006.01)
U.S. Cl. 375—317 16 Claims
OG exemplary drawing
 
1. A data slice control device comprising:
an A/D converter for sampling a data signal transmitted in serial, with a sampling clock of a predetermined frequency, thereby converting the data signal into digital data;
a period setting circuit for setting a predetermined period of the data signal;
a monotone increase detection circuit for detecting a monotone increase detection point indicating that amplitude values of sampling points of the digital data continuously increase within the period that is set by the period setting circuit;
a monotone decrease detection circuit for detecting a monotone decrease detection point indicating that amplitude values of sampling points of the digital data continuously decrease within the period that is set by the period setting circuit;
a counter for performing counting with the sampling clock during the period that is set by the period setting circuit, while resetting the count at a timing when the monotone increase detection circuit detects the monotone increase detection point;
a data holding circuit for holding count data obtained from the counter, at a timing when the monotone decrease detection circuit detects a monotone decrease detection point;
a period determination circuit for determining whether the data signal is within the predetermined period or not, on the basis of the monotone increase detection point obtained from the monotone increase detection circuit, the count data obtained from the counter, and the data held by the data holding circuit;
a maximum value detection circuit for detecting a maximum value of the amplitude values of the digital data within the period during which the monotone increase detection circuit detects the monotone increase points;
a minimum value detection circuit for detecting a minimum value of the amplitude values of the digital data within the period during which the monotone increase detection circuit detects the monotone increase points; and
a slice level calculation circuit for calculating a slice level on the basis of the maximum value obtained from the maximum value detection circuit, the minimum value obtained from the minimum value detection circuit, and a result of determination obtained from the period determination circuit.