US 7,321,325 B2
Background calibration of continuous-time delta-sigma modulator
Hong-Yean Hsieh, Sunnyvale, Calif. (US); and Chia-Liang Lin, Union City, Calif. (US)
Assigned to Realtek Semiconductor Corp., Hsinchu (Taiwan)
Filed on Mar. 27, 2006, as Appl. No. 11/389,990.
Claims priority of provisional application 60/595455, filed on Jul. 07, 2005.
Prior Publication US 2007/0008200 A1, Jan. 11, 2007
Int. Cl. H03M 3/00 (2006.01)
U.S. Cl. 341—143  [341/120] 32 Claims
OG exemplary drawing
 
1. A calibration circuit for adjusting a time constant of at least one integrator in a primary delta-sigma modulator that is configured to convert a continuous-time input signal into a primary discrete-time output sequence, the calibration circuit comprising:
an auxiliary delta-sigma modulator comprising a continuous-time loop filter with at least one integrator that has a substantially similar circuit design as the integrator of the primary delta-sigma modulator, wherein the auxiliary delta-sigma modulator is configured to generate an error sequence and an auxiliary output sequence in response to a calibrating sequence;
an estimator circuit configured to generate an estimation signal based on the error sequence and the auxiliary output sequence, wherein the estimation signal indicates relative error in a time constant of the integrator in the auxiliary delta-sigma modulator; and
a controller circuit configured to adjust the time constant of the integrator in the primary delta-sigma modulator based on the estimation signal.