US 7,320,917 B2 | ||
Semiconductor device and method for manufacturing the same | ||
Hideaki Ohashi, Kasugai (Japan) | ||
Assigned to Fujitsu Limited, Kawasaki (Japan) | ||
Filed on Oct. 22, 2002, as Appl. No. 10/274,876. | ||
Claims priority of application No. 2002-086439 (JP), filed on Mar. 26, 2002. | ||
Prior Publication US 2003/0183898 A1, Oct. 02, 2003 | ||
Int. Cl. H01L 21/00 (2006.01) |
U.S. Cl. 438—278 [438/287; 438/197] | 35 Claims |
1. A method for manufacturing a semiconductor device comprising the steps of:
forming at least one gate electrode structure on a semiconductor substrate with a gate insulating film therebetween so that
gate length thereof is 110 nm or shorter;
forming a sidewall on the side surface of said gate electrode structure;
after forming said side wall forming a silicon oxide film containing a conductive impurity and covering said gate electrode
structure as an interlayer insulating film at film-formation temperature of 650° C. or lower by a high-density plasma CVD
method using a film-formation gas containing He so that difference in a surface level due to said gate electrode structure
is lessened;
forming holes in said interlayer insulating film, with said gate electrode structure being covered with said interlayer insulating
film; and
forming conductive plugs in said holes.
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