US 7,321,167 B2 | ||
Flex tape architecture for integrated circuit signal ingress/egress | ||
Dong Zhong, Chandler, Ariz. (US); Yuan-Liang Li, Chandler, Ariz. (US); Jianggi He, Chandler, Ariz. (US); Jung Kang, Chandler, Ariz. (US); Prashant Parmar, Gilbert, Ariz. (US); Hyunjun Kim, Chandler, Ariz. (US); and Joel Auernheimer, Phoenix, Ariz. (US) | ||
Assigned to Intel Corporation, Santa Clara, Calif. (US) | ||
Filed on Jun. 04, 2003, as Appl. No. 10/455,906. | ||
Prior Publication US 2004/0245610 A1, Dec. 09, 2004 | ||
Int. Cl. H01L 23/495 (2006.01) |
U.S. Cl. 257—701 [257/664; 257/668; 257/E23.177] | 5 Claims |
1. An apparatus comprising:
an integrated circuit; and
a flexible input/output (I/O) signal routing substrate, coupled to said integrated circuit, including:
a first waveguide signal trace having:
a first signal trace; and
a first electrical reference trace; and
a second waveguide signal trace having:
said first electrical reference trace; and
a second signal trace substantially parallel to said first signal trace and configured such that said first electrical reference
trace is disposed between said first signal trace and said second signal trace.
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