US 7,320,919 B2 | ||
Method for fabricating semiconductor device with metal-polycide gate and recessed channel | ||
Tae Kyun Kim, Yongin-si (Korea, Republic of) | ||
Assigned to Hynix Semiconductor Inc., Gyunggi-do (Korea, Republic of) | ||
Filed on Jun. 09, 2006, as Appl. No. 11/450,789. | ||
Claims priority of application No. 10-2005-0111549 (KR), filed on Nov. 22, 2005. | ||
Prior Publication US 2007/0117294 A1, May 24, 2007 | ||
Int. Cl. H01L 21/336 (2006.01) |
U.S. Cl. 438—282 [257/E21.655] | 7 Claims |
1. A method for fabricating a semiconductor device, comprising the steps of:
forming trenches for a recessed channel in an active area of a semiconductor substrate;
forming a gate insulating layer on the semiconductor substrate having the trenches;
forming a gate conductive layer on the entire surface of the resulting structure so that the trenches are buried;
sequentially forming a silicon-rich amorphous metal silicide layer and a gate hard mask on the gate conductive layer;
patterning the gate hard mask and the silicon-rich amorphous metal silicide layer until upper portions of the gate conductive
layer are removed by a predetermined thickness;
forming a metal layer on the entire surface of the patterned structure;
blanket etching the metal layer to remove portions of the metal layer and to sequentially remove exposed portions of the gate
conductive layer and exposed portions of the gate insulating layer, leaving lateral metal capping layers on sides of the silicon-rich
amorphous metal silicide layer and forming patterned gate stacks; and
conducting the thermal treatment of the silicon-rich amorphous metal silicide layer constituting the gate stacks to form a
crystallized metal silicide layer.
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