US 7,321,323 B2
Digital signal coding apparatus, digital signal decoding apparatus, digital signal arithmetic coding method and digital signal arithmetic decoding method
Shunichi Sekiguchi, Tokyo (Japan); Yoshihisa Yamada, Tokyo (Japan); and Kohtaro Asai, Tokyo (Japan)
Assigned to Mitsubishi Denki Kabushiki Kaisha, Tokyo (Japan)
Filed on Jan. 05, 2006, as Appl. No. 11/325,439.
Application 11/325439 is a division of application No. 10/480046, granted, now 7,095,344, previously published as PCT/JP03/04578, filed on Apr. 10, 2003.
Claims priority of application No. 2002-124114 (JP), filed on Apr. 25, 2002.
Prior Publication US 2006/0109149 A1, May 25, 2006
Int. Cl. H03M 7/00 (2006.01)
U.S. Cl. 341—107  [341/51; 341/67; 382/247] 9 Claims
OG exemplary drawing
 
1. A digital signal coding apparatus for partitioning a digital signal into predetermined units for compression coding, comprising:
an arithmetic coding unit for compressing, by arithmetic coding, the digital signal partitioned into the units, wherein
said arithmetic coding unit multiplexes information representing an arithmetic coding status, occurring when a given transmission unit has been coded, into data constituting a subsequent transmission unit.