US 7,321,613 B2 | ||
Automatic impedance matching compensation for a serial point to point link | ||
Lyonel Renaud, Gilbert, Ariz. (US); and Sarath Kotamreddy, Chandler, Ariz. (US) | ||
Assigned to Intel Corporation, Santa Clara, Calif. (US) | ||
Filed on Dec. 31, 2003, as Appl. No. 10/749,429. | ||
Prior Publication US 2005/0141601 A1, Jun. 30, 2005 | ||
Int. Cl. H04B 1/38 (2006.01); H04L 5/16 (2006.01) |
U.S. Cl. 375—220 [375/219; 375/257; 326/30] | 17 Claims |
1. A method comprising:
resetting an integrated circuit (IC) device that has an analog front end (AFE) with an I/O buffer, the I/O buffer having a
driver circuit to transmit a stream of information over a serial point to point link, and a receiver circuit to receive a
stream of information over the link, the driver and the receiver circuits having digitally-controllable transmission line
terminations, respectively, the I/O buffer having a digitally-controllable reference signal level;
automatically calibrating a plurality of impedance matching compensation values against a reference resistor, by a) calibrating
a first compensation value, then b) calibrating a second compensation value, and c) calibrating a third compensation value;
and
automatically applying the calibrated first, second and third compensation values to set said reference signal level, driver
termination, and receiver termination, respectively.
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