US 7,321,530 B2
Decoder circuit, and photo-detecting amplifier circuit and optical pickup including the decoder circuit for disk recording/reproducing apparatus
Katsuyuki Kawamura, Nara (Japan); and Yasuyuki Shirasaka, Sakai (Japan)
Assigned to Sharp Kabushiki Kaisha, Osaka (Japan)
Filed on Apr. 21, 2004, as Appl. No. 10/830,213.
Claims priority of application No. 2003-122840 (JP), filed on Apr. 25, 2003.
Prior Publication US 2004/0264335 A1, Dec. 30, 2004
Int. Cl. G11B 7/00 (2006.01)
U.S. Cl. 369—47.19 4 Claims
OG exemplary drawing
 
1. A decoder circuit mounted on an integrated circuit, the decoder circuit comprising:
a single external input terminal configured to supply an input voltage for decoding by the decoder circuit into three or more control outputs;
a P-type transistor comprising an emitter (source) connected to a power source line of a high level, a base (gate) connected to the external input terminal and a collector (drain) configured to be a first output terminal of a first control output;
an N-type transistor comprising an emitter (source) connected to a power source line of a low level, a base (gate) connected to the external input terminal and a collector (drain) configured to be a second output terminal of a second control output;
a voltage decreasing device one end of which is connected to the external input terminal; and
a first additional transistor comprising a base (gate) connected to another end of the voltage decreasing device or to a connection point of the voltage decreasing device, an emitter (source) connected to the power source line of the high level or the low level, and a collector (drain) configured to be a third output terminal of a third control output.