CPC H10B 12/34 (2023.02) [H10B 12/053 (2023.02)] | 16 Claims |
1. A semiconductor structure, comprising:
a substrate;
a channel located in the substrate, the channel being configured to form a gate structure; and
a convex portion arranged on an inner wall of the channel;
wherein the convex portion comprises a first convex portion arranged on a bottom wall of the channel, and shallow trenches are formed between the first convex portion and two sidewalls of the channel respectively.
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