CPC H01S 5/2272 (2013.01) [H01L 21/20 (2013.01); H01S 5/2086 (2013.01); H01S 5/2224 (2013.01); H01S 5/2275 (2013.01)] | 14 Claims |
13. A semiconductor device comprising a p-n junction on a semiconductor substrate, the semiconductor device fabricated by:
creating a mask layer over the semiconductor substrate, the mask layer having at least one opening to expose a region of the semiconductor substrate;
etching the exposed region using a first etching process utilizing inductively coupled plasma with a preselected first set of parameters to obtain a baseline mesa profile, the baseline mesa profile having a baseline mesa angle;
re-etching the etched region using a second etching process utilizing inductively coupled plasma with a preselected second set of parameters, to alter the baseline mesa profile, the second set of parameters being different from the first preselected parameters, to obtain a requisite mesa profile having a requisite mesa angle different from the baseline mesa angle;
removing the mask layer; and
defining a p-n junction for the semiconductor substrate,
wherein the preselected first set of parameters comprises utilizing the inductively coupled plasma for the first etching process which is denser compared to the inductively coupled plasma utilized as part of the preselected second set of parameters for the second etching process.
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