US 12,170,284 B2
Semiconductor on insulator having a semiconductor layer with different thicknesses
Ming Chyi Liu, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 15, 2021, as Appl. No. 17/376,623.
Prior Publication US 2023/0018629 A1, Jan. 19, 2023
Int. Cl. H01L 27/12 (2006.01); H01L 21/762 (2006.01); H01L 21/84 (2006.01)
CPC H01L 27/1203 (2013.01) [H01L 21/76251 (2013.01); H01L 21/76264 (2013.01); H01L 21/84 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for forming an integrated chip (IC), comprising:
receiving a workpiece comprising a semiconductor layer disposed over a first semiconductor substrate;
forming a first recess in the semiconductor layer;
forming a first insulating layer over the semiconductor layer and in the first recess;
after forming the first insulating layer, etching completely through the first insulating layer and into the semiconductor layer to form a second recess that is laterally separated from the first recess by a part of the semiconductor layer;
forming a second insulating layer over the semiconductor layer and in the second recess;
bonding a second semiconductor substrate to the workpiece, such that the second insulating layer separates the second semiconductor substrate from the semiconductor layer; and
after the second semiconductor substrate is bonded to the workpiece, removing the first semiconductor substrate.