US 12,169,641 B2
System and method for NAND multi-plane and multi-die status signaling
Avadhani Shridhar, San Jose, CA (US); and Neil Buxton, Milton (GB)
Assigned to KIOXIA CORPORATION, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Jan. 13, 2023, as Appl. No. 18/097,043.
Application 18/097,043 is a continuation of application No. 17/025,882, filed on Sep. 18, 2020, granted, now 11,556,272.
Prior Publication US 2023/0153024 A1, May 18, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0653 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A Solid-State Drive (SSD), comprising:
a non-volatile memory (NVM) having a plurality of memory devices;
a controller for causing the plurality of memory devices in the NVM to perform respective operations;
a status contact between the controller and the NVM, wherein each of the plurality of memory devices is commonly connected to the status contact; and
a mechanism by which each of the plurality of memory devices independently and without command from the controller provides, via the status contact, the controller with its own status that it has completed its respective operations, and by which the controller is able to distinguish, via the status contact, an independent completion status for each of the plurality of memory devices.