US 12,170,313 B2
Heterojunction bipolar transistor with buried trap rich isolation region
Vibhor Jain, Williston, VT (US); Anthony K. Stamper, Burlington, VT (US); John J. Ellis-Monaghan, Grand Isle, VT (US); Steven M. Shank, Jericho, VT (US); and Rajendran Krishnasamy, Essex Junction, VT (US)
Assigned to GLOBALFOUNDRIES U.S. Inc., Malta, NY (US)
Filed by GLOBALFOUNDRIES U.S. Inc., Malta, NY (US)
Filed on May 26, 2023, as Appl. No. 18/324,637.
Application 18/324,637 is a division of application No. 17/074,891, filed on Oct. 20, 2020, granted, now 11,721,719.
Prior Publication US 2023/0299132 A1, Sep. 21, 2023
Int. Cl. H01L 29/06 (2006.01); H01L 21/763 (2006.01); H01L 29/08 (2006.01); H01L 29/165 (2006.01); H01L 29/66 (2006.01); H01L 29/737 (2006.01)
CPC H01L 29/0642 (2013.01) [H01L 21/763 (2013.01); H01L 29/0826 (2013.01); H01L 29/165 (2013.01); H01L 29/66242 (2013.01); H01L 29/7371 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A structure comprising:
an isolation region comprising polycrystalline semiconductor material and embedded within a single crystalline substrate;
a heterojunction bipolar transistor above the isolation region; and
a deep trench isolation structure isolating the heterojunction bipolar transistor and contacting the isolation region;
shallow trench isolation structures within a region defined by the deep trench isolation structure; and
a sub-collector below the shallow trench isolation structures, above the isolation region and extending to and contacting the deep trench isolation structure.