CPC G06F 13/42 (2013.01) [G06F 9/52 (2013.01)] | 21 Claims |
1. A circuit, comprising:
a data pipeline connecting multiple data sources to a data receiver; and
a plurality of data arbiters each configured to merge data from a respective data source of the multiple data sources to the data pipeline at a distinct point in the pipeline, each of the plurality of data arbiters including:
a multiplexer configured to selectively pass, to the data pipeline, an upstream data packet or a local data packet from the respective data source;
a register configured to store an indication of data packets passed by the multiplexer based on the respective data source originating the data packet; and
a controller configured to control the multiplexer to select the upstream data packet or the local data packet based on the indication of data packets passed by the multiplexer.
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