CPC H01L 21/02282 (2013.01) [B05D 3/067 (2013.01); B05D 7/546 (2013.01); H01L 21/02126 (2013.01); H01L 21/02164 (2013.01); H01L 21/0223 (2013.01); H01L 21/02323 (2013.01); H01L 21/02348 (2013.01); H01L 21/31111 (2013.01); H01L 21/76224 (2013.01); H01L 21/823481 (2013.01); H01L 29/0649 (2013.01); B05D 1/005 (2013.01); B05D 1/38 (2013.01); G03F 7/162 (2013.01); H01L 21/02255 (2013.01); H01L 21/76825 (2013.01); H01L 21/76826 (2013.01); H01L 21/76828 (2013.01); H01L 21/76832 (2013.01)] | 20 Claims |
1. A method of semiconductor processing, the method comprising:
spin-coating a first portion of a dielectric material on to a non-planar substrate;
curing the first portion of the dielectric material to decompose Si—N and Si—H bonds in the first portion of the dielectric material to form a first silicon nitride;
spin-coating a second portion of the dielectric material on the first portion of the dielectric material, wherein the second portion comprises a second silicon nitride; and
thermal annealing the dielectric material to form an annealed dielectric material on the substrate, wherein the thermal annealing the dielectric material converts the first silicon nitride and the second silicon nitride into a silicon oxide material and increases a thickness of the dielectric material.
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