US 12,170,264 B2
Integrated circuit packages and methods of forming the same
Chih-Chia Hu, Taipei (TW); Ming-Fa Chen, Taichung (TW); and Sung-Feng Yeh, Taipei (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Dec. 15, 2022, as Appl. No. 18/081,705.
Application 18/081,705 is a continuation of application No. 16/398,159, filed on Apr. 29, 2019, granted, now 11,562,982.
Prior Publication US 2023/0113285 A1, Apr. 13, 2023
Int. Cl. H01L 25/065 (2023.01); H01L 21/683 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01)
CPC H01L 25/0652 (2013.01) [H01L 21/6835 (2013.01); H01L 23/562 (2013.01); H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 25/50 (2013.01); H01L 2221/68354 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06524 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06586 (2013.01); H01L 2924/3511 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit package, comprising:
an interposer structure having an interposer bonding dielectric layer, interposer bonding pads, and a redistribution layer structure disposed below the interposer bonding dielectric layer, wherein the interposer bonding dielectric layer laterally surrounds the interposer bonding pads;
a first die stack, comprising a plurality of first die structures, wherein a first die structure of the first die stack facing the interposer structure has a first bonding pad, and a first bonding dielectric layer surrounding the first bonding pad, the first bonding pad is connected to a first one of the interposer bonding pads, and the first bonding dielectric layer is connected to the interposer bonding dielectric layer;
a bulk die, located aside the first die stack, wherein the bulk die has a second bonding pad, and a second bonding dielectric layer surrounding the second bonding pad, the second bonding pad is connected to a second one of the interposer bonding pads, and the second bonding dielectric layer is connected to the interposer bonding dielectric layer; and
a bulk cover member disposed over the first die stack and the bulk die,
wherein a first adhesive layer is disposed between the bulk cover member and the first die stack, a second adhesive layer is disposed between the bulk cover member and the bulk die, and a sidewall of the first die stack is flush with a sidewall of the first adhesive layer,
wherein the bulk cover member is a semiconductor member and is in contact with a dielectric encapsulation inserted between the first adhesive layer and the second adhesive layer.