US 12,170,201 B2
Method for preparing semiconductor structure and semiconductor structure
Qiang Wan, Hefei (CN); Tao Liu, Hefei (CN); and Sen Li, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Sep. 30, 2021, as Appl. No. 17/490,025.
Application 17/490,025 is a continuation of application No. PCT/CN2021/107793, filed on Jul. 22, 2021.
Claims priority of application No. 202110224667.X (CN), filed on Mar. 1, 2021.
Prior Publication US 2022/0278190 A1, Sep. 1, 2022
Int. Cl. H01L 21/033 (2006.01); H10B 12/00 (2023.01); H01L 49/02 (2006.01)
CPC H01L 21/0338 (2013.01) [H01L 21/0337 (2013.01); H01L 28/40 (2013.01); H10B 12/03 (2023.02)] 11 Claims
OG exemplary drawing
 
1. A method for preparing a semiconductor structure, comprising:
providing a substrate, wherein the substrate comprises a base, and a first dielectric layer and a first mask layer sequentially formed;
forming a first mask pattern on the substrate, wherein the first mask pattern comprises first mask structures spaced apart from each other and first trench structures exposing the substrate, each of the first trench structures is arranged between two adjacent first mask structures, each of the first mask structures comprises a first insulating layer and a first patterned photoresist layer, and the first insulating layer is arranged between the first patterned photoresist layer and the first mask layer and covers a portion of a side wall of the first patterned photoresist layer;
forming a second insulating layer, wherein the second insulating layer covers an upper surface of the first mask pattern and a bottom portion and a side wall of each of the first trench structures, and a thickness of the second insulating layer is the same as a thickness of the first insulating layer;
forming a first filling material layer, wherein the first filling material layer covers a surface of the second insulating layer, and the first filling material layer and the second insulating layer fill the first trench structures;
removing a portion of the first filling material layer and the second insulating layer on an upper surface of the first patterned photoresist layer to form a first filling layer, wherein an upper surface of the first filling layer is flush with the upper surface of the first patterned photoresist layer;
forming a first polysilicon layer on the first filling layer, wherein the first polysilicon layer covers the upper surface of the first filling layer and the upper surface of the first patterned photoresist layer;
forming a second mask pattern on the first mask pattern, wherein the second mask pattern comprises second mask structures spaced apart from each other and second trench structures exposing a portion of the first polysilicon layer, each of the second trench structures is arranged between two adjacent second mask structures, each of the second mask structures comprises a third insulating layer and a second patterned photoresist layer, the third insulating layer is arranged between the second patterned photoresist layer and the first mask pattern, and the third insulating layer covers a portion of a side wall of the second patterned photoresist layer;
forming a fourth insulating layer, wherein the fourth insulating layer covers a surface of the second patterned photoresist layer and a bottom portion and a side wall of each of the second trench structures, and a thickness of the fourth insulating layer is the same as a thickness of the third insulating layer;
removing the second patterned photoresist layer and the fourth insulating layer on the surface of the second patterned photoresist layer to form a first pattern structure; and
etching the first mask pattern, the first mask layer, and a portion of the first dielectric layer by using the first pattern structure as a mask.