US 12,169,646 B2
Managing threshold voltage drift based on operating characteristics of a memory sub-system
Murong Lang, San Jose, CA (US); and Zhenming Zhou, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Apr. 8, 2022, as Appl. No. 17/716,689.
Application 17/716,689 is a continuation of application No. 16/552,165, filed on Aug. 27, 2019, granted, now 11,307,799.
Prior Publication US 2022/0229603 A1, Jul. 21, 2022
Int. Cl. G06F 3/06 (2006.01); G11C 7/10 (2006.01); G11C 7/22 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0614 (2013.01); G06F 3/0632 (2013.01); G06F 3/0673 (2013.01); G11C 7/1051 (2013.01); G11C 7/1096 (2013.01); G11C 7/22 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A method comprising:
storing a data structure comprising a target read voltage level corresponding to each set of values of a plurality of sets of values corresponding to a plurality of operating conditions of a memory device of a memory sub-system, wherein the plurality of operating conditions comprises two or more of a write-to-write delay time, a write-to-read delay time, a memory die temperature, or a cycling condition;
in response to receiving a command to execute a read operation associated with a memory cell of the memory device, measuring a current set of measured values of the plurality of operating conditions associated with the memory cell;
identifying a match between a first set of values of the plurality of sets of values corresponding to the plurality of operating conditions and the current set of measured values of the plurality of operating conditions;
identifying, using the data structure, a first stored target read voltage level corresponding to the match between the first set of values and the current set of measured values of the plurality of operating conditions; and
executing, by a processing device, the read operation using the first stored target read voltage level.