CPC H01L 29/0634 (2013.01) [H01L 29/1608 (2013.01); H01L 29/66068 (2013.01); H01L 29/7813 (2013.01)] | 3 Claims |
1. A method of manufacturing a superjunction silicon carbide semiconductor device, the method comprising:
as a first process, forming a parallel pn structure on a front surface of a silicon carbide semiconductor substrate of a first conductivity type, the parallel pn structure having a plurality of first columns of the first conductivity type and a plurality of second columns of a second conductivity type, the first columns and the second columns being disposed repeatedly alternating one another in a plane parallel to the front surface;
as a second process, forming a first semiconductor layer of the second conductivity type at a surface of the parallel pn structure;
as a third process, selectively forming a plurality of first semiconductor regions of the first conductivity type in a surface layer of the first semiconductor layer;
as a fourth process, forming a gate insulating film in contact with the first semiconductor layer;
as a fifth process, forming a gate electrode on a first surface of the gate insulating film, the first surface being opposite to a second surface of the gate insulating film, the second surface being in contact with the first semiconductor layer;
as a sixth process, forming a first electrode in contact with the first semiconductor layer and the first semiconductor regions; and
as a seventh process, forming a second electrode on a back surface of the silicon carbide semiconductor substrate, wherein
in the first process, forming an epitaxial layer of the second conductivity type on the front surface of the silicon carbide semiconductor substrate and selectively forming a plurality of semiconductor regions of the first conductivity type by implanting nitrogen ions in the epitaxial layer are repeated a plurality of times, thereby forming the parallel pn structure.
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