US 12,170,113 B2
Concurrent programming of retired wordline cells with dummy data
Jeffrey S. McNeil, Nampa, ID (US); Kishore Kumar Muchherla, San Jose, CA (US); Sead Zildzic, Folsom, CA (US); Akira Goda, Tokyo (JP); Jonathan S. Parry, Boise, ID (US); and Violante Moschiano, Avezzano (IT)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Dec. 7, 2022, as Appl. No. 18/076,488.
Claims priority of provisional application 63/292,026, filed on Dec. 21, 2021.
Prior Publication US 2023/0197163 A1, Jun. 22, 2023
Int. Cl. G11C 16/10 (2006.01); G11C 16/08 (2006.01); G11C 16/28 (2006.01)
CPC G11C 16/102 (2013.01) [G11C 16/08 (2013.01); G11C 16/28 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device comprising:
a memory array comprising a plurality of wordlines; and
control logic, operatively coupled with the memory array, to perform operations comprising:
identifying a set of cells of the memory array for retirement, the set of cells corresponding to a group of retired wordlines of the plurality of wordlines;
generating dummy data to be programmed on the set of cells; and
concurrently programming the set of cells with the dummy data by causing a ganged programming pulse to be applied to the set of cells.