US 12,170,855 B2
Photoelectric conversion apparatus and imaging system
Yukihiro Kuroda, Inagi (JP)
Assigned to Canon Kabushiki Kaisha, Tokyo (JP)
Filed by CANON KABUSHIKI KAISHA, Tokyo (JP)
Filed on Nov. 8, 2023, as Appl. No. 18/505,008.
Application 18/505,008 is a continuation of application No. 17/849,486, filed on Jun. 24, 2022, granted, now 11,856,306.
Application 17/849,486 is a continuation of application No. 17/015,729, filed on Sep. 9, 2020, granted, now 11,418,743, issued on Aug. 16, 2022.
Application 17/015,729 is a continuation of application No. 16/268,324, filed on Feb. 5, 2019, granted, now 10,798,327, issued on Oct. 6, 2020.
Claims priority of application No. 2018-022023 (JP), filed on Feb. 9, 2018.
Prior Publication US 2024/0073561 A1, Feb. 29, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H04N 25/709 (2023.01); H01L 27/146 (2006.01); H01L 31/107 (2006.01); H04N 25/772 (2023.01); H04N 25/773 (2023.01); H04N 25/79 (2023.01); H03K 5/01 (2006.01); H03K 21/38 (2006.01)
CPC H04N 25/709 (2023.01) [H01L 27/146 (2013.01); H01L 27/14609 (2013.01); H01L 27/14634 (2013.01); H01L 31/107 (2013.01); H04N 25/772 (2023.01); H04N 25/773 (2023.01); H04N 25/79 (2023.01); H03K 5/01 (2013.01); H03K 21/38 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A photoelectric conversion apparatus comprising:
a first chip having a first semiconductor substrate on which a diode of avalanche amplification type is disposed and a first wiring layer;
a second chip having a second semiconductor substrate on which a signal processing circuit that processes a signal based on an output from the diode is disposed and a second wiring layer;
a first terminal configured to be connectable to a power supply outside of the first and the second chips and providing a second voltage; and
a second terminal configured to be connectable to a power supply outside of the first and the second chips and providing a fourth voltage,
wherein the first chip and the second chip are layered,
wherein the first wiring layer and the second wiring layer are disposed between the first semiconductor substrate and the second semiconductor substrate,
wherein the diode is supplied with a first voltage and the second voltage,
wherein the signal processing circuit is supplied with a third voltage and the fourth voltage,
wherein a difference between the first voltage and the second voltage is greater than a difference between the third voltage and the fourth voltage, and
wherein the first terminal is disposed in either the first wiring layer or the second wiring layer, and the second terminal is disposed in either the first wiring layer or the second wiring layer.