CPC H04W 56/001 (2013.01) [H04W 12/0431 (2021.01)] | 20 Claims |
1. An apparatus comprising at least one processor; and at least one memory including computer program code; the at least one memory and the computer program code configured to, with the at least one processor, cause the apparatus at least to:
embed information for time synchronization to a Synchronization Signal Block, SSB;
encrypt the SSB; and
transmit the encrypted SSB comprising the information for time synchronization in a cellular communication network.
|