US 12,170,335 B2
Epitaxial structures for semiconductor devices
Shahaji B. More, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Feb. 27, 2023, as Appl. No. 18/174,831.
Application 18/174,831 is a continuation of application No. 17/146,581, filed on Jan. 12, 2021, granted, now 11,594,638.
Claims priority of provisional application 63/065,686, filed on Aug. 14, 2020.
Prior Publication US 2023/0215951 A1, Jul. 6, 2023
Int. Cl. H01L 29/786 (2006.01); H01L 21/02 (2006.01); H01L 21/265 (2006.01); H01L 21/285 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/78618 (2013.01) [H01L 21/02532 (2013.01); H01L 21/02603 (2013.01); H01L 21/26513 (2013.01); H01L 21/28518 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/45 (2013.01); H01L 29/66553 (2013.01); H01L 29/66742 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming a stack of first and second semiconductor layers arranged in an alternating configuration on a substrate;
etching the substrate to form an opening adjacent to the stack of first and second semiconductor layers;
forming inner spacers on sidewalls of the first semiconductor layers;
forming a first epitaxial layer with first epitaxial portions on sidewalls of the second semiconductor layers, second epitaxial portions on sidewalls of the inner spacers, and a third epitaxial portion in the opening, wherein the first epitaxial portions are thicker than the second epitaxial portions;
performing an etching process on the first epitaxial layer;
forming a second epitaxial layer on the first epitaxial layer; and
forming a third epitaxial layer on the second epitaxial layer.