CPC H01L 24/96 (2013.01) [G06F 8/451 (2013.01); H01L 21/4846 (2013.01); H01L 21/563 (2013.01); H01L 21/568 (2013.01); H01L 21/6835 (2013.01); H01L 24/19 (2013.01); H01L 24/97 (2013.01); H01L 25/50 (2013.01); H01L 2021/6006 (2013.01); H01L 25/0657 (2013.01); H01L 2224/0231 (2013.01); H01L 2224/11002 (2013.01)] | 19 Claims |
1. A method of forming active-bridge-coupled GPU chiplets, comprising:
bonding a first GPU chiplet and a second GPU chiplet to a temporary carrier wafer;
bonding a face surface of an active bridge chiplet to a face surface of the first and second GPU chiplets, wherein the active bridge chiplet includes a level of cache memory and wherein the active bridge chiplet is configured to communicatively couple the level of cache memory to the first and second GPU chiplets such that the level of cache memory is cache coherent across the first and second GPU chiplets; and
mounting the first and second GPU chiplets to a carrier substrate.
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