CPC H10B 10/12 (2023.02) [H01L 23/528 (2013.01); H01L 27/0207 (2013.01); H01L 27/0924 (2013.01)] | 6 Claims |
1. An integrated circuit structure, comprising:
a substrate;
an eight transistor (8T) register file (RF) bit cell on the substrate, the 8T RF bit cell comprising:
first, second, third and fourth active regions parallel along a first direction of the substrate;
first and second gate lines over the first, second, third and fourth active regions, the first and second gate lines parallel along a second direction of the substrate, the second direction perpendicular to the first direction; and
third and fourth gate lines over the first and second active region, but not over the third and fourth active regions, the third and fourth gate lines parallel along the second direction of the substrate.
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