US 12,169,678 B2
Operating method of electronic device for semiconductor memory manufacture
Useong Kim, Hwaseong-si (KR); Bayram Yenikaya, San Jose, CA (US); Mindy Lee, San Jose, CA (US); Xin Zhou, San Jose, CA (US); Hee-Jun Lee, Seoul (KR); and Woo-Yong Cho, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Oct. 26, 2021, as Appl. No. 17/510,652.
Prior Publication US 2023/0125680 A1, Apr. 27, 2023
Int. Cl. G06F 30/398 (2020.01); G06V 10/44 (2022.01); G06V 10/88 (2022.01)
CPC G06F 30/398 (2020.01) [G06V 10/44 (2022.01); G06V 10/88 (2022.01); G06V 2201/06 (2022.01)] 19 Claims
OG exemplary drawing
 
1. An operating method of an electronic device for manufacture of a semiconductor device, the method comprising:
receiving a layout image of the semiconductor device;
generating an intermediate image by generating assist features based on main features of the layout image;
evaluating a process result by performing simulation based on the intermediate image; and
correcting the intermediate image by correcting shapes of the main features and/or the assist features of the intermediate image based on the process result,
wherein the correcting of the intermediate image is performed reversely to the evaluating of the process result to generate correction information of the intermediate image, and
wherein the correcting of the intermediate image is performed based on a target slope of a change in an intensity of light and a slope of a change in the intensity of light at a boundary of each of main features obtained from the evaluating of the process result.