CPC G06F 13/28 (2013.01) [G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01)] | 19 Claims |
1. A Peripheral Component Interconnect express (PCIe) device comprising:
a Direct Memory Access (DMA) device including a plurality of functions; and
a PCIe interface device configured to perform communication between a host and the DMA device and including a reset operation controller configured to:
group, when a plurality of reset signals are received from the host, reset operations, which are the same type as other of the reset operations corresponding to other of the plurality of reset signals received from the host, determine a processing order of the reset operations, and perform the reset operations according to the processing order,
wherein the grouped reset operations comprise a first reset operation, which is included in reset operations corresponding to a first reset signal having a high priority among the plurality of reset signals, and a second reset operation, which is the same type as the first reset operation and included in reset operations corresponding to a second reset signal having a low priority among the plurality of reset signals, and
wherein the reset operation controller:
performs the reset operations, which include the first reset operation, corresponding to the first reset signal; and
performs reset operations excluding the second reset operation among the reset operations corresponding to the second reset signal, after performing the reset operations corresponding to the first reset signal.
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