CPC H01L 25/0657 (2013.01) [H01L 21/56 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H01L 24/14 (2013.01); H01L 24/95 (2013.01)] | 20 Claims |
1. A method, comprising:
attaching interconnect structures to a carrier, wherein each one of the interconnect structures comprises conductive pillars, wherein the conductive pillars protrude from a top surface of the respective interconnect structure;
forming an encapsulant over the interconnect structures, wherein the encapsulant extends between adjacent ones of the interconnect structures;
performing a planarization process on the encapsulant to expose the conductive pillars, wherein after performing the planarization process the encapsulant and the conductive pillars have coplanar surfaces, wherein after performing the planarization process the encapsulant extends over the respective top surface of each interconnect structure;
forming first redistribution layers on the encapsulant and on the conductive pillars, wherein a bottom first redistribution layer of the first redistribution layers is electrically connected to the conductive pillars; and
bonding a semiconductor package to a top first redistribution layer of the first redistribution layers.
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