CPC H01L 27/1203 (2013.01) [H01L 21/76251 (2013.01); H01L 21/76264 (2013.01); H01L 21/84 (2013.01)] | 20 Claims |
1. A method for forming an integrated chip (IC), comprising:
receiving a workpiece comprising a semiconductor layer disposed over a first semiconductor substrate;
forming a first recess in the semiconductor layer;
forming a first insulating layer over the semiconductor layer and in the first recess;
after forming the first insulating layer, etching completely through the first insulating layer and into the semiconductor layer to form a second recess that is laterally separated from the first recess by a part of the semiconductor layer;
forming a second insulating layer over the semiconductor layer and in the second recess;
bonding a second semiconductor substrate to the workpiece, such that the second insulating layer separates the second semiconductor substrate from the semiconductor layer; and
after the second semiconductor substrate is bonded to the workpiece, removing the first semiconductor substrate.
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