US 12,170,316 B2
Nitride semiconductor device with element isolation area
Akira Yoshioka, Yokohama Kanagawa (JP); Yasuhiro Isobe, Ota Tokyo (JP); Hung Hung, Kawasaki Kanagawa (JP); Hitoshi Kobayashi, Yamato Kanagawa (JP); Tetsuya Ohno, Yokohama Kanagawa (JP); and Toru Sugiyama, Musashino Tokyo (JP)
Assigned to Kabushika Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed by Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed on Oct. 20, 2023, as Appl. No. 18/490,965.
Application 18/490,965 is a continuation of application No. 17/190,070, filed on Mar. 2, 2021, granted, now 11,830,916.
Claims priority of application No. 2020-155011 (JP), filed on Sep. 15, 2020.
Prior Publication US 2024/0047533 A1, Feb. 8, 2024
Int. Cl. H01L 29/778 (2006.01); H01L 29/06 (2006.01); H01L 29/20 (2006.01); H01L 29/417 (2006.01)
CPC H01L 29/2003 (2013.01) [H01L 29/0653 (2013.01); H01L 29/41775 (2013.01); H01L 29/7786 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first nitride semiconductor layer;
a second nitride semiconductor layer on the first nitride semiconductor layer and having a first region, a second region, a third region between the first region and the second region in a first direction that is parallel to a surface of the first nitride semiconductor layer, the second nitride semiconductor layer having a bandgap greater than that of the first nitride semiconductor layer;
a first gate electrode on the first region and extending in a second direction that is parallel to the surface of the first nitride semiconductor layer;
a first source electrode on the first region and extending in the second direction;
a second gate electrode on the second region and extending in the second direction;
a second source electrode on the second region and extending in the second direction;
a drain electrode electrically connected to a first wiring and a second wiring, the first wiring directly contacting the second nitride semiconductor layer in the first region, the second wiring directly contacting the second nitride semiconductor layer in the second region; and
an insulation material on the third region, wherein
the first wiring and the second wiring are separated from each other in the first direction, and
a portion of the drain electrode is above the first wiring, the second wiring, and the insulation material in a third direction orthogonal to the surface of the first nitride semiconductor layer such that the first and second wirings are between the portion of the drain electrode and the second nitride semiconductor layer in the third direction.