US 12,170,508 B2
Amplifier circuit for amplifying sinusoid signals
Håkan Berg, Harestad (SE)
Assigned to Sivers Wireless AB, (SE)
Filed by Sivers Wireless AB, Kista (SE)
Filed on Dec. 8, 2022, as Appl. No. 18/077,928.
Claims priority of application No. 21216735 (EP), filed on Dec. 22, 2021.
Prior Publication US 2023/0198477 A1, Jun. 22, 2023
Int. Cl. H03D 7/12 (2006.01); H03D 7/18 (2006.01); H03F 3/19 (2006.01); H03F 3/193 (2006.01)
CPC H03F 3/193 (2013.01) [H03D 7/125 (2013.01); H03D 7/18 (2013.01); H03F 2200/336 (2013.01); H03F 2200/451 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An amplifier circuit configured to amplify a plurality of sinusoid signals, wherein the sinusoid signals have a relative phase difference to each other, the amplifier circuit comprising:
a first sequence of at least three transistor amplifiers, wherein:
a first terminal of each transistor amplifier of the first sequence is configured to receive one respective signal of the plurality of sinusoid signals; and
a second terminal of each transistor amplifier of the first sequence is connected to a current source;
a second sequence of at least three transistor amplifiers comprising a first transistor amplifier and a last transistor amplifier, wherein:
a second terminal of each transistor amplifier of the second sequence is connected to a third terminal of one respective transistor amplifier of the first sequence;
a third terminal of each transistor amplifier of the second sequence is connected to a supply voltage; and
a first terminal of each transistor amplifier of the second sequence is connected to the third terminal of a next transistor amplifier of the second sequence;
wherein the first terminal of the last transistor amplifier is connected to the third terminal of the first transistor amplifier; and
wherein the first terminals are bases or gates, the second terminals are emitters or sources, and the third terminals are collectors or drains.