CPC H01L 27/14634 (2013.01) [H01L 27/14636 (2013.01); H04N 25/773 (2023.01); H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/08145 (2013.01)] | 20 Claims |
1. A semiconductor device, comprising:
a semiconductor substrate;
a first capacitative element stacked on the semiconductor substrate; and
a second capacitative element that is stacked on a side of the semiconductor substrate opposite to a side on which the first capacitative element is stacked,
wherein a capacitance value of the second capacitative element has bias characteristics that are opposite to bias characteristics of a capacitance value of the first capacitative element, and
wherein the first capacitative element and the second capacitative element are connected in parallel,
wherein, where n is an integer, n-number of the first and second capacitative elements are provided, and
wherein the n-number of capacitative elements are connected in parallel such that, when a capacitance value of the elements as a whole when a potential difference between electrodes is equal to an operating voltage is denoted by Ctotal(V), a capacitance value of the elements as a whole when the potential difference between electrodes is 0 is denoted by Ctotal(0), a bias dependence coefficient including positive or negative of a capacitance value of each capacitative element is denoted by An, an element size of each capacitative element is denoted by Sn, and a capacitance density of each capacitative element is denoted by Cn(V), bias characteristics of a capacitance value of the capacitative elements as a whole
Ctotal(V)/Ctotal(0)=ΣAn*Cn(V)*Sn/Ctotal(0)
most closely approaches 1.
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