US 12,171,104 B2
Method and structures pertaining to improved ferroelectric random-access memory (FeRAM)
Tzu-Yu Chen, Kaohsiung (TW); Kuo-Chi Tu, Hsin-Chu (TW); Sheng-Hung Shih, Hsinchu (TW); and Fu-Chen Chang, New Taipei (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on Jun. 16, 2023, as Appl. No. 18/336,093.
Application 18/336,093 is a continuation of application No. 17/376,531, filed on Jul. 15, 2021, granted, now 11,723,213.
Application 17/376,531 is a continuation in part of application No. 16/452,965, filed on Jun. 26, 2019, granted, now 11,195,840, issued on Dec. 7, 2021.
Claims priority of provisional application 62/738,604, filed on Sep. 28, 2018.
Prior Publication US 2023/0337440 A1, Oct. 19, 2023
Int. Cl. H10B 53/30 (2023.01); H01L 49/02 (2006.01)
CPC H10B 53/30 (2023.02) [H01L 28/60 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming a bottom electrode layer, a ferroelectric layer over the bottom electrode layer, and a top electrode layer over the ferroelectric layer;
forming a mask over the top electrode layer;
with the mask in place, performing an etch to remove a portion of the top electrode layer to leave a top electrode structure in place and stopping the etch at a height corresponding to a surface of the ferroelectric layer to define a ferroelectric structure including a ledge along a sidewall of the ferroelectric structure, wherein the ledge is spaced apart from an uppermost surface of the ferroelectric structure by a distance that is approximately 5% to approximately 30% of a total height of the ferroelectric structure;
forming a conformal dielectric layer over the surface of the ferroelectric layer, along sidewalls of the top electrode structure, and over an upper surface of the top electrode structure;
etching back the conformal dielectric layer to form a dielectric sidewall spacer structure on the surface of the ferroelectric layer and along sidewalls of the top electrode structure;
with the mask and the dielectric sidewall spacer structure in place, removing a portion of the ferroelectric layer and removing a portion of the bottom electrode layer;
forming a first liner along outermost sidewalls of the dielectric sidewall spacer structure and over an upper surface of the mask, the first liner having a first material composition; and
forming a second liner along outermost sidewalls of the first liner and over an upper surface of the first liner, the second liner having a second material composition that differs from the first material composition.