CPC H10B 41/27 (2023.02) [G11C 5/025 (2013.01); G11C 5/06 (2013.01); H01L 23/5386 (2013.01); H01L 27/092 (2013.01); H10B 43/27 (2023.02); B81B 1/00 (2013.01); B81B 2201/07 (2013.01)] | 24 Claims |
1. A microelectronic device, comprising:
a base structure comprising a logic region including logic devices;
a memory array overlying the base structure and comprising vertically extending strings of memory cells within a horizontal area of the logic region of the base structure; and
a conductive pad tier overlying the memory array and comprising:
first conductive pads substantially outside of the horizontal area of the logic region of the base structure; and
second conductive pads horizontally neighboring the first conductive pads and within the horizontal area of the logic region of the base structure.
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