CPC G06F 11/3612 (2013.01) [G06F 9/44505 (2013.01)] | 20 Claims |
1. A device for processing bit strings of a program flow, comprising:
a data memory designed to store a first bit string;
bit string manipulator circuitry designed to:
access the data memory to obtain the first bit string from the data memory and store in a second memory;
access the second memory to verify during processing an integrity of the first bit string at a predetermined bit string section of the first bit string having information indicating a target state of the program flow; and
if the verification indicates that the first bit string deviates from a predefined instruction set of the program flow, access the second memory to manipulate the first bit string in the bit string section to obtain a second bit string, wherein the second bit string comprises, in the bit string section, a valid instruction such that the second bit string corresponds to the predefined instruction set of the program flow for error-compensated processing; and
an interface designed to output a signal having the second bit string.
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