US 12,170,250 B2
Microelectronic devices and memory devices including conductive levels having varying compositions
Jordan D. Greenlee, Boise, ID (US); John D. Hopkins, Meridian, ID (US); Everett A. McTeer, Eagle, ID (US); Yiping Wang, Boise, ID (US); Rajesh Balachandran, Douglas (IE); Rita J. Klein, Boise, ID (US); and Yongjun J. Hu, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jan. 23, 2023, as Appl. No. 18/157,962.
Application 18/157,962 is a continuation of application No. 17/209,993, filed on Mar. 23, 2021, granted, now 11,594,495.
Prior Publication US 2023/0154856 A1, May 18, 2023
Int. Cl. H01L 23/538 (2006.01); G11C 5/02 (2006.01); G11C 5/06 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 27/06 (2006.01)
CPC H01L 23/5386 (2013.01) [G11C 5/025 (2013.01); G11C 5/06 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/53204 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 27/0688 (2013.01)] 18 Claims
OG exemplary drawing
 
12. A microelectronic device, comprising:
a stack structure comprising tiers each comprising a conductive level and an insulative level vertically neighboring the conductive level, each conductive level comprising:
a first conductive structure; and
a second conductive structure laterally neighboring the first conductive structure and comprising grains having a larger grain size than the first conductive structure; and
vertical strings of memory cells vertically extending through the stack structure.