CPC H03K 5/2481 (2013.01) | 11 Claims |
1. A comparator arranged for operation under low average power consumption for comparing a first analogue input signal with a second analogue input signal, the comparator comprising:
a differential input stage comprising two input switches forming an input differential pair, for comparison of a transition between said first and second analogue input signals;
an output stage for providing a digital output of the comparator in accordance with a difference between said first and second analogue input signals;
a further differential input stage comprising two input switches forming a further input differential pair between said input differential pair and said output stage;
a bias current stage for providing a bias current to said differential input stage, wherein said bias current stage provides said bias current in correspondence with said first and second analogue input signals, wherein said bias current stage is configured by a single switch that includes a transistor;
a current mirror stage, formed by said transistor of said bias current stage and another transistor connected to said differential input stage; and
a stability stage comprising a switch and a resistor and connected between said further input differential pair and said input differential pair.
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